This is the last opportunity for me to present a message as thecurrent MVL TC Chair. My primary responsibility was to see thatour TC conducts a program of varied activities that satisfy theneeds of TC members, Computer Society members, and the computingprofession. These activities include conferences,workshops, tutorials,newsletters, awards programs, student activities, standards, etc.For an example, it is happy for me to hear that our activity isreflected to the trend of the IEEE International Solic-State CircuitsConference held in San Francisco on Feburary 5-7, 1998. As a technologydirectition category, a session of "low-voltage and multi-leveltechniques" is being established.
As I have been demonstrated, especially activities of youngergenerations are very important for development of our field. Wehave to encourage students and younger researchers to enter thefield. One of the most important solutions is to make our fieldmore and more attractive by ourselves, and make pioneering work.I hope everybody continues to have the pioneering spirit.
From this point of view, the International Symposiums on Multiple-ValuedLogic (ISMVLs) are very important opportunity to present and discussour new research results. I hope many younger researchers as wellas established ones attend the annual ISMVLs.
I would also like to use this opportunity to welcome new MVLTCChair. Prof.Gerhard Dueck is elected as next Chair from January1998 to December 1999. I hope his leadership encourages our researchactivities and brings many fruitful results in the MVL TC.
Again, thank you very much for all of your cooperations and supportsduring two years.
Best regards,
Michitaka Kameyama
The following is the voting results for the MVLTC-Chair Election1997.
Paper Ballot Count Subtotals:
For Gerhard Dueck: 28
For Ivan Stojmenovic: 5
e-mail Ballot Count Subtotals:
For Gerhard Dueck: 12
For Ivan Stojmenovic: 4
Election Totals:
For Gerhard Dueck: 40
For Ivan Stojmenovic: 9
Next MVL TC Chair
Gerhard Dueck
Department of Mathematics and Computer Science
St. Francis Xavier University, Canada
Election Committee Members
Noboru Takagi
Chales B.Silio
We have made the web site for ISMVL'98.
Please visit the site and give me constructive comments.
ISMVL'98 Symposium Chair
Tsutomu Sasao
The aim of Multiple-Valued Logic - - An International Journal(MVL) is to publish and diseminate knowledge in the field of multiple-valuedlogic and related areas. Specific topics include (but are notlimited to):
MVL and Soft Computing: neural networks, evolutionary computation,fuzzy systems, computational intelligence, cost-effectiveness
MATHEMATICAL ASPECTS OF MVL: algebra, logic, logic minimization,spectral methods
ENGINEERING ASPECTS OF MVL: circuit design, programmable logic,hardware and software verification, testing, analog and digitalVLSI and ULSI, new concept devices and architectures: biocomputingand optical computing
MVL AND AUTOMATED REASONING: machine learning , reasoning, theoremproving, expert systems
COMPUTER SCIENCE AND MVL: databases, massively parallel systems
FUZZY LOGIC and MVL: theoretical and practical aspects
PHILOSOPHICAL ASPECTS OF MVL
Papers should contain original results that have neither beensubmitted to, nor appeared in any journal or book. The journalwill also publish survey papers.
CONTRIBUTIONS CAN BE SUBMITTED TO THE MANAGING EDITORS OR TO ANYMEMBER OF THE EDITORIAL BOARD.
Volume 1 (4 issues) is published in 1996. Three issues of Volume2 are published
this year, and the 4-th issue is forthcoming by the end of year.
Contents of Volume 2:
Issue 1:
Norbert Schmechel, On the lattice-isomorphism between fuzzy equivalence
relations and fuzzy partitions
H. Wagner, Nonaxiomatizability and Undecidability of an Infinite-Valued
Temporal Logic
K. Denecke, The entropy sequence of unary logical functions
Ratko Tosic, Gradimir Vojvodic, Dragan Masulovic, Rade Doroslovacki,Jovanka
Rosic,
Two examples of relative completeness
Issue 2
Special issue: Multiple-Valued Logic in Japan
Guest Editor: Hajime Machida
T. Hozumi, T. Utsumi, N. Kamiura, Y. Hata and K. Yamato, Designof MIN-of-TSUM
form multiple-valued PLA's using universal literals
O. Ishizuka, D. Handoko, K. Tanno, Z. Tang and E.J. McCluskey,Circuit design of
a multi-valued carry look-ahead adder
Y. Nagata and M. Mukaidono, A method of test pattern generationfor
multiple-valued PLA's
T. Hozumi, N. Kamiura, Y. Hata and K. Yamato, On minimizationof
multiple-valued sum-of-products expression with multiple-valuedTRSUM
M. Sakai and K. Futsuhara, Multiple-valued logic of signal control
Issue 3
A. Ngom, C. Reischer, D. Simovici and I. Stojmenovic, Set LogicAlgebra : A
carrier computing foundation
Zilic and Vranesic, Polynomial Interpolation for Reed-Muller Formsfor
Incompletely Specified Functions
Claudio Moraga, Ralph Oenning, Mark Karpowski, The Zhang-WatariTransform: a
Discrete, Real-Valued, Generalized Haar Transform
A.A. Krokhin, Boolean lattices as intervals in clone lattices
Issue 4
Pierguilio Corsini and Jean Mittas, New topics in hypergroup theory
Noboru Takagi, Yutaka Nakamura, Kyoichi Nakashima, Set ValuedLogic
Functions Monotonic in the Set-Theoretical Inclusion
Wendy MacCaull and Gerhard Dueck, Procedure for finding MatrixModels for
Substructural Logics
Sergiu Rudeanu, Gr.C.Moisil-a contributor to the early developmentof lattice
theory
K.W. Current, V.G. Oklobdzija, D. Maksimovic, On Adiabatic Multiple-Valued
Circuits
Alden Pixley and Adil Yaqub, The work of Alfred L. Foster on universalalgebra
MANAGING EDITORS:
Dan A. Simovici
University of Massachusetts at Boston, Department of Mathematicsand Computer
Science, Boston, MA 02125, USA, tel.: (617) 287-6472, e-mail:dsim{at}cs.umb.edu
Ivan Stojmenovic
University of Ottawa, Department of Computer Science, Ottawa,K1N 9B4, CANADA,
tel.: (613) 564-5982, e-mail: ivan{at}csi.uottawa.ca
EDITORS OF MVL-IJ
UPDATED SEPTEMBER 1997
Andrew I. Adamatzky
Biophysics Department, St. Petersburg State University,
P.O. Box 298, St. Petersburg 191025, Russia
ai-adama{at}uwe.ac.uk aa{at}cableinet.co.uk ada{at}ada.usr.pu.ru
Joel Berman
Department of Mathematics, Statistics and Computer Science, University
of Illinois at Chicago, 851 South Morgan Chicago, Illinois 60607-7045USA
jberman{at}uic.edu
Jon T. Butler
Department of Electrical and Computer Engineering, Naval PostgraduateSchool
Code EC/Bu Monterey, CA 93943-5121 USA butler{at}cs.nps.navy.mil
K. Wayne Current
Electrical and Computer Engineering, Department, University ofCalifornia,
Davis, CA 95616 USA current{at}ece.ucdavis.edu
Janos Demetrovics
Computer & Automation Institute, Hungarian Academy of Science,
Lagymanyosi u. 11, H-1111, Budapest, Hungary h935dem{at}ella.hu
Gerhard Dueck
Department of Mathematics and Computer Science, St. Francis XavierUniversity,
Antigonish, N.S. B2G 2W5 Canada dueck{at}stfx.ca
Daniel Etiemble
LRI-UA 410 CNRS Bat 490, Universite Paris Sud, 91405 Orsay Cedex,France
de{at}lri.lri.fr
Lucien Haddad
Department of Mathematics and Computer Science, Royal MilitaryCollege,
Kingston, Ontario K7K 5L0 Canada, haddad{at}sv2.rmc.ca
Reiner Haehnle
Department of Computer Science, University of Karlsruhe, 76128Karlsruhe
Germany haehnle{at}ira.uka.de
Yutaka Hata
Faculty of Engineering Himeji Institute of Technology 2167,
Shosha Himeji, 671-22 Japan hata{at}comp.eng.himeji-tech.ac.jp
Tatsuo Higuchi
Department of System Information Sciences, Graduate School
of Information Sciences, Tohoku University, Aoba Aramaki, Aoba-ku,Sendai
980 Japan thiguchi{at}higuchi.ecei.tohoku.ac.jp
Mou Hu
AEPOS Technology Corp. ADGA Group, 600-116 Albert Street, OttawaOntario K1P
5G3 Canada m.hu{at}adga.ca
Michitaka Kameyama
Department of Computer and Mathematical Sciences, Graduate
School of Information Sciences, Tohoku University, Aoba Aramaki,Aoba-ku,
Sendai 980 Japan michi{at}kameyama.ecei.tohoku.ac.jp
Hajime Machida
Department of Mathematics, Hitotsubashi University, Kunitachi,
Tokyo 186 Japan, machida{at}math2.mori.hit-u.ac.jp.
Robert A. Melter
Department of Mathematics, Long Island University, Southampton
NY 11968 USA rmelter{at}southampton.liunet.edu
D. Michael Miller
Department of Computer Science, University of Victoria,
P.O.Box 3055, Victoria BC V8W 3P6 Canada mmiller{at}csr.csc.uvic.ca
Claudio Moraga
Department of Computer Science University of Dortmund 44221
Dortmund Germany moraga{at}jupiter.informatik.uni-dortmund.de
Masao Mukaidono
Department of Computer Science, Meiji University, 1-1-1 Higashimita,Tama-ku
Kawasaki-shi, 214 Japan masao{at}cs.meiji.ac.jp
Jon C. Muzio
Department of Computer Science, University of Victoria, P.O.Box3055, Victoria
BC V8W 3P6 Canada jmuzio{at}csr.uvic.ca
Zoran Obradovic
School of Electrical Engineering and Computer Science, WashingtonState
University, Pullman, WA 99164-2752, USA zoran{at}eecs.wsu.edu
Ewa Orlowska
Institute of Telecommunications, ul. Szachowa 1 04-894, Warsaw,Poland
orlowska{at}itl.waw.pl
Phil D. Picton
School of Engineering and Technology, Faculty of Applied Science,Nene
College, St. George's Avenue, Northampton, NN2 6JD England phil.picton{at}nene.ac.
Corina Reischer
Department of Mathematics and Computer Science, University
of Quebec at Trois-Rivieres, Trois-Rivieres, Quebec G9A 5H7 Canada
corina_reischer{at}uqtr.uquebec.ca
Ivo G. Rosenberg
Math. Stat. 207, Universite de Montreal, C.P. 6128, succursaleA Montreal,
Quebec H3C 3J7 Canada rosenb{at}ere.umontreal.ca
Sergiu Rudeanu
Department of Mathematics, University of Bucharest, Str. Academiei14,
70109 Bucharest Romania, rud{at}moisil.math.ro
Elie Sanchez
Service Universitaire de Biomathematiques, Faculte de Medecine,
27 Bd Jean Moulin, 13385 Marseille Cedex 5, France
sanchez{at}newsup.univ-mrs.fr
Tsutomu Sasao
Department of Computer Science and Electronics, Kyushu Instituteof Technology,
Iizuka 820 Japan sasao{at}cse.kyutech.ac.jp
Charles B. Silio
Electrical Engineering Department, University of Maryland, CollegePark
MD 20742 USA silio{at}eng.umd.edu
Kenneth C. Smith
Department of Electrical and Electronic Engineering, The HongKong University
of Science and Technology, Kowloon Hong Kong eesmith{at}ee.ust.hk
Helmut Thiele
Department of Computer Science 1, University of Dortmund
D-44221 Dortmund Germany thiele{at}ls1.informatik.uni-dortmund.de
Ratko Tosic
Institute of Mathematics, University of Novi Sad, Trg DositejaObradovica
4, 21000 Novi Sad Yugoslavia ratosic{at}unsim.ns.ac.yu.
Weixin Xie
Shenzhen University, Shenzhen 518060 China xiewx{at}szu.edu.cn
Lotfi A. Zadeh
Computer Science Division and the Electronics Research LaboratoryUniversity
of California Berkeley, CA 94720 USA zadeh{at}cs.berkeley.edu
No.1 Synthesis of Logical Function by using MVL Neuron Models
K. Saitoh, D. Sekimoto, A. Tanaka and M. Matsumoto (Toyo Univ.)
MVL Neuron Model is the model that we have supposed before. Innerpotential of MVL Neurons is composed by the logical product(Min)or logical sum(Max), which product terms is made by the inputsignal (Xi) and Synapse weight(Wi). Leaming oflocal excitabilityNeuron model that is reach to the front membrane in order of theInput- Analog-signal is small ,and the projection of the Synapse-back-membranemove to the position that the signal. This paper says that weinvestigate the leaming characteristic of local-excitability-Neuronmodel, in case of changing leaming-coefficient in times of leaming,Iager leming coefficient, input multi-leming signals. In addition, we says that how to synthesize the Multiple-Valued Logical functionby using of localexcitability-model.
No.2 Knowledge Discovery in Clustering Based on Neural Network
K. Nakagawa, N. Kamiura and Y. Hata (Himeji Inst. of Tech.)
We propose a novel method to discover knowledge based on clustering.Our method is developed on three-layerd neural network consistingof input node corresponding to the number of the attributes andthe output node corresponding to the number of the clusters. Ournetwork learns pre-defined representatives of cluster data. Theclustering then is done by refering the outputs for the data exceptfor representatives We propose the degree of contribution to discoverknowledge from the clustering result. Our experimental resultsshows the degree can be sutable indicater to discover the clusteringknowledge, i.e, how the clustering is done.
No.3 Unsupervised clustering method by genetic algorithms
K. Imai, N. Kamiura and Y. Hata (Himeji Inst. of Tech.)
We propose a method of unsupervised clustering by Genetic Algorithms(GAs) on fuzzy logic. In a database of numerical data we definethe fittness function under the assumption that the distributionof each clusters should be normal distribution. Then The funtionis evaluated by computing the probability of data belonging tothe cluster on Fuzzy logic. For a database of symbols, we definethe futtness function based on the number of symbols in a cluster.Their experimental results shows that the clusteting runs welland the results are satisfied.
No.4 Proposal of a Low-Power and Low-Voltage Cascode Current MirrorUsing Neuron-MOS Transistors
K. Tanno, J. Shen, O. Ishizuka and Z. Tang (Miyazaki Univ.)
In this paper, a low-power and low-voltage operation cascode currentmirror using neuron-MOS (vMOS) transistors is proposed. The proposedmirror can be implemened by using double-poly CMOS process. Ithas advantage of small current consumption with high output resistanceand low output voltage operation. Furthermore, the input resistanceof the proposed mirror is adjusted by weight capacitors of VMOStransistors. The performances of the proposed mirror are estirnatedby HSPICE simulation with MOSIS 2.0kam double-poly and double-metalCMOS process parameters. The mirror is suitable for low-powerand low-voltage multiple-valued logic circuits using many currentmirrors.
No.5 4-Valued Universal-Literal CAM Based on NAND Structure andIts Applications
T. Hanyu, M. Arakaki and M. Kameyama (Tohoku Univ.)
A non-volatile 4-valued content-addressable memory (CAM) basedon NAND structure is proposed for fully parallel pattern matchingoperations with low power dissipation. A universal literal ineach CAM cell is used to cornpare a 4-valued input, value witha 4-valued stored value. Any CAM cell functions are performedby a pair of a simple threshold operation and a 10gic-value conversionwhich is shared by CAM cells in the same column of a CAM cellulararray. Moreover, the use of a single floating-gate MOS transistormakes it possible to implement a universal-1iteral circuit togetherwith a 4-valued storage element. As a result, a high-density 4-valueduniversalliteral CAM with a single transistor cell is designedby using a multi-1ayer interconnection technology. Its performanceis much superior to that of a conventional NOR-structured universal-1iteralCAIVI under less dynamic power dissipat,ion. Finally, it is demonstratedthat the proposed 4-valued CAM is useful as hardware acceleratorsin a real-time image processing system based on logical filteringand in a real-time product,ion system.
No.6 A Design of Multiple-Valued Logic Circuits Using MCP Gates
K. Fujimoto, H. Sasaki (Kyushu Tokai Univ.) and A. Odaka (TokaiUniv.)
In this paper, we propose a Multi-input Complementary Pass gate(M:CP gate) which gives some extension of the Complementary Passgate (CP gate) proposed by Kameyama et al. A control input isgiven by a scalar value in CP gate. On the other hand, it is givenby a vector value in our MCP gate. Using MCP gate, any n-variablep-valued logic function can be realized by at most (P - 1)2n-(p- 2) gates. When we realize function f firstly, we decompose thefunction f ipto ringsum of totally ordered and monotonically increasingfunctions. Secondly we construct MCP gates corresponding to thedecomposed functions off Finally, .f is constructed by connectingthe MCP gates. Any stuck-at faults in a circuit constructed byour method can be detected by ( number of MCP gates )+1 test inputs.
No.7 Efficient Bases for 3-Input-Gate Circuits
T. Nakamura and G. Pogosyan (I.C.U)
Basis is a functionally complete set of Multiple-Valued Logicfunctions that contains no complete proper subset. E~icientlyirreducible basis, termed c-basis, has been introduced in [1].It is a basis which guarantces an optimal implementation of afunction, regarding the number of literals in its formal expression.The notion of c-basis is significant in the composition of functions,since the classical definition of basis does not consider theefErciency of implementation. In case of two-valued functions,an c-basis consists of all unary function, constants, and onlytwo binary functions which are freely chosen from certain classes.In this note, expanding the domain of basib operation from binaryto ternary, we study the efficiency of bases of 3-input operations.This expansion, evidently, induces the decrease ' of the complexityof functions (hence, the complexity of functional circuits tobe designed). Gaining an evident merit in the complexity, we haveto pay a price by considerably increasing number of operationsin such a ternary basis. As we see below, in multiple-valued case,the number of elements in a ternary effircient basis increasesso fast, that it becomes practically infeasible starting withk = 3 . However, in the case Boolean operations this number, althoughlarger, is still small enough to be considered in the practicalcircuit design. This note provides a criterion for the basic setof ternary operations to be efficiently irreducible, for a specialcase called (Te-basis. In the case of Boolean functions the twentytypes of ternary operations which constitute cre-basis are foundand well classifled. Finally, we show a example of twenty functions,which form a (Tc-basis.
No.8 Triangle and trapezoid truth values in fuzzy logic
K. Otsuka, M. Emoto and M. Mukaidono (Meiji Univ.)
Any statement in fuzzy logic takes a value in the unit intervalof [0,1] as a truth value, which is called a numerical truth value,apart from only two truth values O and I in the classical logic.This truth value has been extended into an interval called aninterval truth value. Here, truth values of elements among theinterval are all I in an interval truth value and on the otherhand truth values of elements are values of [0,1] in fuzzy truthvalue. In this paper We consider triangle truth values in whichthe truth values are O at the end of a triangle and I at the topof a triangle, and trapezoid truth values in which the truth valuesare O at the end of a trapezoid and I at two tops of a trapezoid.It is well known that a set of numerical truth values is a modelof Kleene algebra, which is a weaker algebra than Boolean algebra,and a set of interval truth values is a model of De Morgan algebra,which is a weaker algebra than Kleene algebra. Furthermore, theconditions under which a subset of interval truth values satisfiesthe axioms of Kleene algebra are already shown. In this paperthe algebraic structures ofthe set of triangle and trapezoid truthvalues in fuzzy logic are clarified.
No.9 A study on relationship between fuzzy logic and intervalprobability
Y. Yamauchi, T. Nakamura (I.C.U) and M. Mukaidono (Meiji Univ.)
Statements in fuzzy logic and probability both take values inthe unit interval of [0, 1]. Fuzzy logic has succeeded in applicationsbecause of its truth functionality, in other words fuzzy logicassigns unique truth value for its operation. However, probabilisticoperation is not truth functional depending on its events' degreeof subordination.
In this report, the difference between operations in fuzzy logicand probability is discussed. In contrast to the classical operationof probabilistic everts which can be regarded as a approximation,interval probability and paired probability is introduced. Operationsfor these models are defined truth functionally and their algebraicproperties are examined.
No.10 Continuous Maps on the Space of Clones
H. Machida (Hitotsubashi Univ.)
Let $L_{k}$ be the lattice of clones over the set of $k$-valuedlogical functions. In the preceding paper, $L_{k}$ was shown tobe a metric space. In this paper, we define two kinds of mapsfrom $L_{k}$ to $L_{k}$, one of which is induced by meet operatorand the other by join operator, and show that they are continuousmaps. Secondly, we modify the above map induced by meet operatorand construct continuous maps from $L_{3}$ to $L_{2}$. Imagesof maximal clones in $L_{3}$ under these maps are also studied.
No.11 A Note on Realization of Multiple-Valued Logic Functionsby Akers Cells
I. Takanami (Iwate Univ.)
Several celluar arrays realizing any multiple-valued logic functionsusing the Akers' cells have been proposed in the literature. However,those arrays have used a large number of cells and signals tothe output have passed through a lot of cells. In this paper,we propose a method using less cells for realizing any multiple-valuedlogic functions using the Akers' cells. To do so, first we definethe operations for constructing arrays.Using those operations,we construct the arrays which have already been given by Kamiuraet al. We will call those arrays vertical type arrays. Then weprove formally that they realize any multiple-valued logic functions.Next, we propose a building type array which consists of a pedestalarray and vertical type arrays. Then we show that it realizesany multiple-valued logic function. We compare the number of cellsto be used and the path lengths of our arrays with those of arraysproposed by Kamiura et al. in Kamiura. which have been so farconsidered to use the minimum number of cells, where the pathlength is the maximum of the numbers of cells through which signalsshould pass to come out from the output cell.
No.12 The Best Combination of Operators on the Multiple-ValuedSum-of-Products Expression
T. Hozumi, O. Kakusho (Hyogo Univ.) and Y. Hata (Himeji Inst.of Tech.)
In the three-valued logic, it is shown that the MODSUM-of-MlNsexpressions require the fewest product terms of all three-valuedsum-of-products expressions. This paper shows the best operatorsfor four-valued sum-of-products expression. First, we considerthe minimum requirements of functions usable as a logic operatorand list up all functions satisfied the requirements. Using thefunctions, we examine the numbers of product terms required toexpress any four-valued two-variable functions and show that thereare some expressions requiring fewer product terms than the MODSUM-of-MlNsexpressions. However, we point out that the expression is toocomplicate to derive and minimize the logic expression and showthat the MODSUM-ofMlNs expression is also the best in the four-valuedlogic from the viewpoint of cost reduction and designability.
No.13 Report of ISMVL97
No.14 Special Presentation : Redundant Multiple-Valued NumberSystems
Jon. T. Butler (Naval Postgraduate School)
No.15 A New Canonical Form for enumerating Fuzzy/C Switching Functions
T. Araki, H. Tatsumi (Kanagawa Inst. of Tech.) and M. Mukaidono(Meiji Univ.)
Logic functions, for example, fuzzy switching functions and multiple-valuedKleenean functions, that are models of Kleene algebra have beenstudied as foundation of fuzzy logic. This paper deals with anew function - fuzzy switching function with constants - whichhave features of both the above two kind of functions, and proposesa new canonical form for enumeration of it. This canonical formis much useful to estimate simply capabilities of representationof the above all functions.
No.16 Fundamental Properties on the Number of Fuzzy/C SwitchingFunctions
H. Tatsumi, T. Araki (Kanagawa Inst. of Tech.) and M. Mukaidono(Meiji Univ.)
This paper describes an estimation on the size of n-variable fuzzyswitching functions with constants ("fuzzy/c " for short).The whole set of fuzzy/c switching functions is divided into equivalenceclasses called c. - equivalent. Estimating each equivalence classcan be reduced to enumerating disjunctive forms of a binary switchingfunction, which can be solved by enumerating anti-chains of thepartially ordered set composed of simple phrases. Based on theenumerating properties and an improved method for estimating anti-chains,we can get upper and lower bounds on the number of n-variablefuzzy/c switching functions.
No.17 Minimization of Incompletely Specified Fuzzy/C SwitchingFunctions
T. Araki, H. Tatsumi (Kanagawa Inst. of Tech.) and M. Mukaidono(Meiji Univ.)
Recently, fuzzy switching functions with constants (for short,Fuzzy/C switching functions) have been studied. And their fundamentalproperties, representation of logic formulas and so on have beenstudied. Minimization problem, however, have not been much studied,and there is no work on minimization of incompletely specifiedFuzzy/C switching functions . This paper proposes an algorithmto do it and gives a proof that the algorithm is correct.
No.18 Implementation of multiplex-computing system based on orthogonalsequences
T. Takei, Y. Yuminaka and Y. Sasaki (Gunma Univ.)
Multiplex-computing system called wave-parallel computing (WPC)system is proposed to address the interconnection problem in massivelyinterconnected VLSI architectures required for intelligent informationprocessing. The fundamental concepts are the multiplexing of orthogonalsequence signals onto a single line, and their wave-parallel processingwithout decomposition. This paper discusses the realization ofa compact orthogonal sequence generator and a detector based onorthogonal-M sequences. To confirm the principle of wave-parallelcomputing, we carried out the basic experiment on the parallelmatrix-vector multiplier using PLD (Programmable Logic Devices).The experiments show that the WPC architectures may have potentialadvantages in the design of massively parallel processing withmany interconnections.
No.19 Application and Fuzzy Control using Multi-Valued Multi-Thresholdbased on Threshold Control
M. Hirano and F. Wakui (Nihon Univ.)
This paper shows, the circuits to perform a new hysteresis typemembership function in the fuzzy controller, and the experimentalresults to estimate the effects of this function. This functioncorresponds to a direction of transition and selects an effectivegrade value, when a state of the non-fuzzy inputs transits. Sucha selection characteristic realizes by a new input sensibilitythat is set up in a wide range from low sensibility to super highsensibility. Therefore, a hysteresis type fuzzy control usingthis function can set up a new sensivitity trace for the controller.Further by an application, we confirm the effect in an experimentof DC motor.
No.20 A Membership Function for Automatic Harmonization System
M. Tokumaru, K. Yamashita, N. Muranaka and S. Imanishi (KansaiUniv.)
We developed the automatic harmonization system using fuzzy method.This system adopt the two fuzzy sets classified with "fittinga chord to a melody" and "propriety of a chord progressionaccording to considering music theory" and the membershipfunction of the two sets are determined from seven parametersin all. The arranger can get his favorite chord progression easilyby setting the parameters. In this research, we investigate therelation between the parameters and the reasoning chord. We composethe system using genetic algorithm which study the reasoning parameterautomatically from the original melody and chord, and get resultthat the reasoning system require the different parameters inthe part ofthe melody which differs from another part with imagein music.
No.21 Proposal of A/D converter using resonant-tunneling quaternaryquantizer
T. Waho and M. Yamamoto (NTT)
A 4 bit flash AD converter that uses resonant-tunneling quaternaryquantizers and source-coupled FET Iogic (SCFL) encoders is described.The quantizer consists of six resonant-tunneling diodes (RTDS)connected in series and one HEMT. The number of active devicesincluded is 196, one fifth that of conventional ones. SPICE simulationresults in the quantizer aperture times of 15 ps. Maximum samplingfrequencies of 10 GHZ at 1.2 W are also predicted with InP-basedRTD and HEMT technology.
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